Method for fabricating a semiconductor device including a MOS transistor having a silicide layer

A semiconductor device comprising:

• a substrate;
• and
• a gate stack over the substrate,
• wherein the gate stack comprises:
• a gate dielectric layer;
• a barrier layer over the gate dielectric layer;
• a lower gate electrode layer over the barrier layer;
• an intermediate gate electrode layer over the lower gate electrode layer;
• and
• an upper gate electrode layer over the intermediate gate electrode layer,
• wherein:
• the barrier layer includes at least one of titanium nitride, tantalum nitride or a combination thereof,
• a lower region of the lower gate electrode layer includes a metal region,
• an upper region of the lower gate electrode layer includes a metal silicide region, and
• the intermediate gate electrode layer includes a poly-silicon layer.

A semiconductor device comprising:

• a gate stack over a substrate;
• and
• gate spacers disposed on sides of the gate stack,
• wherein the gate stack comprises:
• a gate dielectric layer;
• a lower gate electrode layer over the gate dielectric layer;
• an upper gate electrode layer over the lower gate electrode layer;
• and
• a gate capping layer over the upper gate electrode layer,
• wherein:
• the lower gate electrode layer includes a first lower silicide region and a first upper silicide region,
• the upper gate electrode layer includes a second lower silicide region and a second silicide region,
• the second lower silicide region of the upper gate electrode layer is silicon-richer than the second upper silicide region of the upper gate electrode layer, and
• the second upper silicide region of the upper gate electrode layer is metal-richer than the second lower silicide region of the upper gate electrode layer.