Circuits and methods for coherent writing to host systems

A circuit system comprising:

• first, second, and third buffer circuits;
• and
• arbitration and multiplexing circuitry that provides first write data generated from a first agent for a first write request and a first identifier of the first agent to the first buffer circuit, wherein the arbitration and multiplexing circuitry provides a first write command for the first write request and the first identifier to the second buffer circuit,
• wherein the arbitration and multiplexing circuitry provides second write data generated by a second agent for a second write request and a second identifier of the second agent to the first buffer circuit, and wherein the arbitration and multiplexing circuitry provides a second write command for the second write request and the second identifier to the third buffer circuit.

A method for providing a write request to a host system, the method comprising:

• generating write data and a write command for the write request at first logic circuitry;
• storing the write data and the write command received from the first logic circuitry in second logic circuitry;
• generating a write response at the host system in response to receiving the write command from the second logic circuitry;
• providing the write response from the host system to the second logic circuitry;
• and
• providing the write data from the second logic circuitry to the host system in response to receiving the write response from the host system before providing the write response to the first logic circuitry.