On chip test architecture for continuous time delta sigma analog-to-digital converter
AssigneeSTMicroelectronics International N.V.
InventorsAnkur Bal, Abhishek Jain, Sharad Gupta
Life of this patent
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Abstract
An integrated circuit includes a continuous time delta sigma analog-to-digital converter (CTDS ADC) and a test circuit for testing the CTDS ADC. The test circuit converts multibit digital reference data to a single-bit digital stream. The test circuit then passes the single-bit digital stream to a finite impulse response digital-to-analog converter (FIR DAC). The FIR DAC converts the single-bit digital stream to an analog test signal. The analog test signal is then passed to the CTDS ADC. The CTDS ADC converts the analog test signal to digital test data. The test circuit analyzes the digital test data to determine the accuracy of the CTDS ADC.
Claims20
An integrated circuit, comprising:
- a test circuit configured to convert digital reference data representing an analog reference signal to digital reference data, to convert the digital reference data to a single-bit data stream, and to convert the single-bit data stream to an analog test signal;
- and
- a continuous time delta sigma analog-to-digital converter coupled to the test circuit and including:
- an input configured to receive the analog test signal from the test circuit;
- conversion circuitry configured to convert the analog test signal to digital test data;
- and
- an output configured to output the digital test data, wherein the test circuit is configured to receive the digital test data from the continuous time delta sigma analog-to-digital converter and to assess a performance of the continuous time delta sigma analog-to-digital converter based on the digital test data.
A method, comprising:
- storing, in an integrated circuit, digital reference data corresponding to a digital representation of an analog reference signal;
- converting the digital reference data to a single-bit data stream;
- converting the single-bit data stream to an analog test signal;
- converting the analog test signal to digital test data;
- and
- comparing the digital test data to the digital reference data including:
- digitally filtering the digital test data;
- performing gain and offset normalization of the digital test data;
- aligning a phase of the digital test data with a phase of the digital reference data;
- and
- cross-correlating the digital test data with the digital reference data.
An integrated circuit, comprising:
- a reference memory storing digital reference data corresponding to an over-sampled X-bit representation of an analog reference signal;
- a modulator configured to generate, from the digital reference data, a single-bit data stream;
- a finite-impulse response digital-to-analog converter including a plurality of flip-flops coupled in series, a plurality of single-bit digital-to-analog converters each coupled to an output of a respective flip-flop, and a plurality of summers, the finite-impulse response digital-to-analog converter configured to convert the single-bit data stream to an analog test signal by summing outputs of the single-bit digital-to-analog converters with the summers;
- a Y-bit continuous time delta-sigma analog-to-digital converter configured to convert the analog test signal to digital test data, wherein Y is an integer less than or equal to X;
- and
- a test circuit configured to determine an accuracy of the continuous time delta-sigma analog-to-digital converter by comparing the digital test data to the digital reference data.
Dependencies are inferred from the claim text.