Current sharing apparatus and control method
AssigneeReed Semiconductor Corporation
InventorsWenkai Wu, Yingqian Ma, Cheng-Wei Chen, Weidong Zhu, Qian Chen
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Abstract
An apparatus includes a plurality of switches connected in parallel between an input terminal and an output terminal of a power bus, a plurality of current sensing circuits coupled to the plurality of switches, wherein each current sensing circuit is coupled to a corresponding switch, and a plurality of current sharing circuits configured to receive current sensing signals from the plurality of current sensing circuits and generate a plurality of gate drive signals to control the plurality of switches so as to achieve a predetermined current distribution among the plurality of switches.
Claims14
An apparatus comprising:
- a plurality of switches connected in parallel between an input terminal and an output terminal of a power bus;
- a plurality of current sensing circuits coupled to the plurality of switches, wherein each current sensing circuit is coupled to a corresponding switch;
- and
- a plurality of current sharing circuits configured to receive current sensing signals from the plurality of current sensing circuits and generate a plurality of gate drive signals to control the plurality of switches so as to achieve a predetermined current distribution among the plurality of switches, wherein each current sensing circuit comprises a sense switch and a current signal processing circuit, and wherein the current signal processing circuit is configured to generate a current signal and an average current signal, and wherein a drain of the sense switch is connected to a drain of the corresponding switch;
- and the current signal processing circuit comprises a first amplifier, a first transistor, a first resistor, a second amplifier, a second transistor, a second resistor and a current mirror, and wherein:
- a non-inverting input and an inverting input of the first amplifier are connected to a source of the sense switch and a source of the corresponding switch, respectively;
- an output of the first amplifier is connected to a gate of the first transistor;
- the first transistor and the first resistor are connected in series between the non-inverting input of the first amplifier and ground;
- a non-inverting input of the second amplifier is connected to a common node of the first transistor and the first resistor;
- an output of the second amplifier is connected to a gate of the second transistor;
- and
- the second transistor and the second resistor are connected in series between the current mirror and ground, wherein a common node of the second transistor and the second resistor is connected to an inverting input of the second amplifier.
A method comprising:
- providing power to a load through a plurality of power switches connected in parallel;
- detecting currents flowing through the plurality of power switches;
- and
- based on detected currents, adjusting gate drive signal of the plurality of power switches so as to achieve a balanced current distribution among the plurality of power switches, wherein the steps above further comprise:
- providing power to the load through a first switch, a second switch and a third switch connected in parallel;
- generating a first current signal proportional to a first current flowing through the first switch, and generating a first average current signal based on the first current flowing through the first switch;
- generating a second current signal proportional to a second current flowing through the second switch, and generating a second average current signal based on the second current flowing through the second switch;
- generating a third current signal proportional to a third current flowing through the third switch, and generating a third average current signal based on the third current flowing through the third switch;
- generating a first voltage signal through feeding the first current signal into a first adjustable resistor;
- generating a second voltage signal through feeding the second current signal into a second adjustable resistor;
- generating a third voltage signal through feeding the third current signal into a third adjustable resistor;
- and
- generating an average current signal through feeding the first average current signal, the first average current signal and the third average current signal into an auxiliary resistor.
A system comprising:
- a first switch, a second switch and a third switch connected in parallel between an input terminal and an output terminal of a power bus;
- a first current sensing circuit configured to generate a first current signal proportional to a first current flowing through the first switch, and generate a first average current signal based on the first current flowing through the first switch;
- a second current sensing circuit configured to generate a second current signal proportional to a second current flowing through the second switch, and generate a second average current signal based on the second current flowing through the second switch;
- a third current sensing circuit configured to generate a third current signal proportional to a third current flowing through the third switch, and generate a third average current signal based on the third current flowing through the third switch;
- and
- a plurality of current sharing circuits configured to receive current sensing signals from the first current sensing circuit, the second current sensing circuit and the third current sensing circuit, and generate gate drive signals to control the first switch, the second switch and the third switch so as to achieve a predetermined current distribution among the first switch, the second switch and the third switch, wherein:
- the plurality of current sharing circuits comprises a first comparator, a second comparator and a third comparator, and wherein:
- non-inverting inputs of the first comparator, the second comparator and the third comparator are connected together and further connected to an auxiliary resistor;
- an inverting input of the first comparator is connected to a first adjustable resistor;
- an inverting input of the second comparator is connected to a second adjustable resistor;
- an inverting input of the third comparator is connected to a third adjustable resistor;
- an output of the first comparator is configured to generate a first gate drive signal applied to the first switch;
- an output of the second comparator is configured to generate a second gate drive signal applied to the second switch;
- and
- an output of the third comparator is configured to generate a third gate drive signal applied to the third switch.
Dependencies are inferred from the claim text.