Back to results
US 12,463,076 B2Granted
3D semiconductor device and structure
AssigneeMonolithic 3D Inc.
InventorsZvi Or-Bach, Brian Cronquist, Deepak C. Sekar
Life of this patent
Estimating the term…
Abstract
A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including first transistors, where the first transistors each include a single crystal channel; first metal layers interconnecting at least the first transistors; and a second level including a second single crystal layer, the second level including second transistors, where the second level overlays the first level, where the second level is bonded to the first level, where the bonded includes oxide to oxide bonds, where the bonded includes metal to metal bonds, and where at least one of the first transistors controls power delivery to at least one of the second transistors.
Claims17
A 3D semiconductor device, the device comprising:
- a first wafer comprising a first level, said first level comprising a first single crystal layer and first transistors,
- wherein said first transistors each comprise a single crystal channel;
- first metal layers interconnecting at least said first transistors;
- and
- a second wafer comprising a second level, said second level comprising a second single crystal layer and second transistors,
- wherein said second level overlays said first level,
- wherein said second wafer is hybrid bonded to said first wafer,
- wherein said bonded comprises oxide to oxide bonds,
- wherein said bonded additionally comprises simultaneous metal to metal bonds made on a same level as the oxide to oxide bonds,
- wherein at least one of said first transistors is capable of operating with a first voltage as a maximum operating first voltage,
- wherein at least one of said second transistors is capable of operating with a second voltage as a maximum operating second voltage, and
- wherein said first voltage is much greater than said second voltage.
9 more elements
A 3D semiconductor device, the device comprising:
- a first wafer comprising a first level, said first level comprising a first single crystal layer and first transistors,
- wherein said first transistors each comprise a single crystal channel;
- first metal layers interconnecting at least said first transistors;
- and
- a second wafer comprising a second level, said second level comprising a second single crystal layer and second transistors,
- wherein said second level overlays said first level,
- wherein said second wafer is hybrid bonded to said first wafer,
- wherein said bonded comprises oxide to oxide bonds,
- wherein said bonded additionally comprises simultaneous metal to metal bonds made on a same level as the oxide to oxide bonds,
- wherein at least one of said second transistors comprises hafnium oxide,
- wherein at least one of said first transistors is capable of operating with a first voltage as a maximum operating first voltage,
- wherein at least one of said second transistors is capable of operating with a second voltage as a maximum operating second voltage, and
- wherein said first voltage is much greater than said second voltage.
10 more elements
A 3D semiconductor device, the device comprising:
- a first wafer comprising a first level, said first level comprising a first single crystal layer and first transistors,
- wherein said first transistors each comprise a single crystal channel;
- first metal layers interconnecting at least said first transistors;
- and
- a second wafer comprising a second level, said second level comprising a second single crystal layer and second transistors,
- wherein said second level overlays said first level,
- wherein said second wafer is hybrid bonded to said first wafer,
- wherein said bonded comprises oxide to oxide bonds,
- wherein said bonded additionally comprises simultaneous metal to metal bonds made on a same level as the oxide to oxide bonds,
- wherein at least one of said second transistors comprises hafnium oxide,
- wherein each of said second transistors are horizontally oriented, and
- wherein each of said second transistors comprise at least two side gates.
9 more elements
A 3D semiconductor device, the device comprising:
- a first wafer comprising a first level, said first level comprising a first single crystal layer and first transistors,
- wherein said first transistors each comprise a single crystal channel;
- first metal layers interconnecting at least said first transistors;
- and
- a second wafer comprising a second level, said second level comprising a second single crystal layer and second transistors,
- wherein said second level overlays said first level,
- wherein said second wafer is hybrid bonded to said first wafer,
- wherein said bonded comprises oxide to oxide bonds,
- wherein said bonded additionally comprises simultaneous metal to metal bonds made on a same level as the oxide to oxide bonds,
- wherein at least one of said second transistors comprises hafnium oxide,
- wherein said device comprises an array of memory cells,
- wherein a plurality of said memory cells comprise at least two of said second transistors, and
- wherein said first level comprises a periphery circuit to control said array of memory cells.
10 more elements
A 3D semiconductor device, the device comprising:
- a first wafer comprising a first level, said first level comprising a first single crystal layer and first transistors,
- wherein said first transistors each comprise a single crystal channel;
- first metal layers interconnecting at least said first transistors;
- and
- a second wafer comprising a second level, said second level comprising a second single crystal layer and second transistors,
- wherein said second level overlays said first level,
- wherein said second wafer is hybrid bonded to said first wafer,
- wherein said bonded comprises oxide to oxide bonds,
- wherein said bonded additionally comprises simultaneous metal to metal bonds made on a same level as the oxide to oxide bonds,
- wherein at least one of said second transistors comprises hafnium oxide,
- wherein at least one of said second transistors is an N-type transistor, and
- wherein at least one of said second transistors is a P-type transistor.
9 more elements
A 3D semiconductor device, the device comprising:
- a first wafer comprising a first level, said first level comprising a first single crystal layer and first transistors,
- wherein said first transistors each comprise a single crystal channel;
- first metal layers interconnecting at least said first transistors;
- and
- a second wafer comprising a second level, said second level comprising a second single crystal layer and second transistors,
- wherein said second level overlays said first level,
- wherein said second wafer level is hybrid bonded to said first wafer level,
- wherein said bonded comprises oxide to oxide bonds,
- wherein said bonded additionally comprises simultaneous metal to metal bonds made on a same level as the oxide to oxide bonds,
- wherein at least one of said first transistors is capable of operating with a first voltage as a maximum operating first voltage,
- wherein at least one of said second transistors is capable of operating with a second voltage as a maximum operating second voltage,
- wherein said first voltage is much greater than said second voltage, and
- wherein at least one of said second transistors comprises hafnium oxide.
10 more elements
Dependencies are inferred from the claim text.