Method for programming a memory device to reduce retention error

A system, comprising:

• a memory controller configured to generate and send a reprogramming instruction to a memory device;
• the memory device coupled to the memory controller and configured to store data, comprising:
• a plurality of memory cells, comprising a first set of memory cells configured to be programmed into a first set of programming states each of which is not lower than a first predetermined programming state;
• and
• a control circuit coupled to the plurality of memory cells and configured to:
• perform a first program pass to program the first set of memory cells;
• in response to receiving the reprogramming instruction, reprogram at least a first memory cell from the first set of memory cells;
• and
• perform a second program pass to program the first set of memory cells after the first memory cell is reprogrammed.

A method for operating a memory device comprising a plurality of memory cells, the plurality of memory cells comprising a first set of memory cells configured to be programmed into a first set of programming states each of which is not lower than a first predetermined programming state, the method comprising:

• performing a first program pass to program the first set of memory cells;
• continuing to program at least a first memory cell from the first set of memory cells with one or more first programming voltages, wherein a threshold voltage of the first memory cell is greater than a first verification voltage that corresponds to a first programming state of the first memory cell;
• and
• performing a second program pass to program the first set of memory cells after the first memory cell is continued to be programmed with the one or more first programming voltages.

A method for operating a system comprising a memory controller and a memory device, comprising:

• generating, by the memory controller, a reprogramming instruction;
• sending, by the memory controller, the reprogramming instruction to the memory device, wherein the memory device comprises a first set of memory cells configured to be programmed into a first set of programming states each of which is not lower than a first predetermined programming state;
• performing, by the memory device, a first program pass to program the first set of memory cells;
• in response to receiving the reprogramming instruction, reprogramming, by the memory device, at least a first memory cell from the first set of memory cells;
• and
• performing, by the memory device, a second program pass to program the first set of memory cells after the first memory cell is reprogrammed.

A memory device, comprising:

• a plurality of memory cells, comprising:
• a first set of memory cells configured to be programmed into a first set of programming states each of which is not lower than a first predetermined programming state;
• and
• a second set of memory cells configured to be programmed into a second set of programming states each of which is lower than the first predetermined programming state;
• and
• a control circuit coupled to the plurality of memory cells and configured to:
• perform a first program pass to program the first set of memory cells and the second set of memory cells;
• continue to program at least a first memory cell from the first set of memory cells with one or more first programming voltages, wherein a first width of a first threshold voltage distribution of the first memory cell is different from a second width of a second threshold voltage distribution of a second memory cell from the second set of memory cells;
• and
• perform a second program pass to program the first set of memory cells and the second set of memory cells after the first memory cell is continued to be programmed with the one or more first programming voltages.