Nonvolatile memory package, storage device including the same, and method of operating thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsAnil Kavala, Youngmin Jo, Jungjune Park, Chiweon Yoon
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Abstract
A storage device includes a plurality of memory chips, a buffer chip connected to the plurality of memory chips, and a controller connected to the buffer chip. The buffer chip is configured to periodically receive a first command from the controller, and perform a DQS oscillator enable operation in response to the first command. At least one memory chip among the plurality of memory chips and the buffer chip are configured to perform write training or read training when the DQS oscillator enable operation is performed.
Claims20
A storage device comprising:
- a plurality of memory chips;
- a buffer chip connected to the plurality of memory chips;
- and
- a controller connected to the buffer chip,
- wherein the buffer chip is configured to periodically receive a first command from the controller, and perform a DQS oscillator enable operation in response to the first command, and
- at least one memory chip among the plurality of memory chips and the buffer chip are configured to perform write training or read training when the DQS oscillator enable operation is performed.
A method of operating a storage device, the method comprising:
- performing a DQS oscillator enable/disable operation between a controller and a buffer chip;
- and
- performing training between a memory chip and the buffer chip using a DQS oscillator clock generated by a DQS oscillator of the buffer chip or the memory chip while performing the DQS oscillator enable/disable operation.
A nonvolatile memory package comprising:
- a plurality of memory chips;
- and
- a buffer chip connected to the plurality of memory chips,
- wherein the buffer chip includes:
- a first sampler configured to sample read data transmitted from one of the plurality of memory chips when a read operation is performed;
- a second sampler configured to sample write data transmitted from an external device when a program operation is performed;
- a DQS oscillator configured to generate a strobe clock DQS in response to a first command;
- and
- a counter and register configured to count the strobe clock DQS and store a counted value, and
- wherein when the DQS oscillator is enabled in response to the first command, the buffer chip and at least one of the plurality of memory chips perform hidden read training or hidden write training.
Dependencies are inferred from the claim text.