Semiconductor device for performing data reduction for processing arrays

A semiconductor device comprising:

• a first layer comprising:
• one or more first connectors for connecting the first layer to a processing element array in a stacked arrangement, wherein the processing element array includes a plurality of processing elements that are configured to generate a plurality of processing results,
• a first plurality of reduction operators configured to perform one or more first data reduction operations on at least a portion of the plurality of processing results generated by the plurality of processing elements on the processing element array and generate a first plurality of data reduction results, and
• a first interconnect coupled to the first plurality of reduction operators and the one or more first connectors;
• and
• a second layer comprising:
• one or more second connectors for connecting the second layer to the processing element array in the stacked arrangement,
• a second plurality of reduction operators configured to perform one or more second data reduction operations on at least a portion of the plurality of processing results generated by the plurality of processing elements on the processing element array and generate a second plurality of data reduction results, and
• a second interconnect coupled to the second plurality of reduction operators and the one or more second connectors.