Reformatting matrices to improve computing efficiency

A data ordering device, comprising:

• a plurality of inputs N;
• a plurality of outputs M;
• a sorting network coupled between the plurality of inputs N and the plurality of outputs M;
• one or more latches comprising an input buffer coupled between each input of the plurality of inputs N and a corresponding input of the sorting network;
• one or more latches comprising an output buffer coupled between each output of the plurality of outputs M and a corresponding output of the sorting network, wherein the sorting network is coupled between the input buffer and the output buffer;
• one or more private vector registers coupled between the plurality of inputs N and the input buffer;
• one or more private vector registers coupled between the plurality of outputs M and the output buffer;
• and
• an input for a control signal operative to initiate a sorting of data between the plurality of inputs N and the plurality of outputs M.