US 12,457,784 B2 · Semiconductor device with lateral base link region

Abstract

A semiconductor device, such as a heterojunction bipolar transistor (HBT), may include an extrinsic base region an intrinsic base region, and a lateral base link region disposed between and in contact with each of the extrinsic base region and an intrinsic base region. The extrinsic base region, the lateral base link region, and a portion of the intrinsic base region each may be formed on a passivation layer disposed over an isolation region and a collector region of a substrate of the semiconductor device. The extrinsic base region and a first portion of the lateral base link region may be formed from polycrystalline semiconductor material. The intrinsic base region and a second portion of the lateral base link region may be formed from monocrystalline semiconductor material. The lateral base link region may be formed after formation of the extrinsic base region and the intrinsic base region.

Claims19

Dependent claims

A method comprising:

providing a substrate that includes an isolation region that includes dielectric material and a collector region that includes semiconductor material, and a passivation layer disposed on the substrate;
forming an extrinsic base layer on the passivation layer;
forming an intrinsic base layer over the collector region;
and
forming a lateral base link region between the extrinsic base layer and the intrinsic base layer, wherein the lateral base link region is disposed on the passivation layer and directly contacts respective side surfaces of the extrinsic base layer and the intrinsic base layer, wherein the lateral base link region is separated from the collector region by at least the passivation layer, and wherein the lateral base link region is formed after forming the intrinsic base layer.

2 more elements

A transistor device comprising:

a substrate comprising a collector region that includes semiconductor material and an isolation region that includes first dielectric material;
a dielectric layer that includes second dielectric material, wherein the dielectric layer is formed over the substrate;
a first semiconductor layer disposed on the dielectric layer overlapping the isolation region;
a second semiconductor layer disposed over the collector region, wherein at least a portion of the second semiconductor layer is disposed on the dielectric layer;
a third semiconductor layer disposed on the dielectric layer between the first semiconductor layer and the second semiconductor layer, wherein the third semiconductor layer is separated from the collector region by at least the dielectric layer;
and
a fourth semiconductor layer disposed over the second semiconductor layer and the third semiconductor layer.

4 more elements

Dependencies are inferred from the claim text.

Semiconductor device with lateral base link region

Life of this patent

Semiconductor device with lateral base link region

Life of this patent

Abstract

Claims19