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US 12,457,752 B2Granted
High-density low voltage non-volatile memory with unidirectional plate-line and bit-line and pillar capacitor
AssigneeKepler Computing Inc.
InventorsSasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh
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Abstract
Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.
Claims13
An apparatus comprising:
- a transistor having a source, a drain, and a gate;
- a word-line coupled to the gate;
- a bit-line coupled to one of the source or drain of the transistor;
- a plate-line;
- and
- a capacitive structure coupled to one of the source or drain of the transistor through one or more vias, and to the plate-line, wherein the capacitive structure comprises:
- a first ferroelectric material having a first inverted u-shape;
- a second ferroelectric material having a second inverted u-shape;
- a first conductive oxide inside a first gap area of the first inverted u-shape, wherein the first conductive oxide abuts inner sidewalls of the first ferroelectric material, wherein the first conductive oxide fully fills the first gap area;
- a second conductive oxide inside a second gap area of the second inverted u-shape, wherein the second conductive oxide abuts inner sidewalls of the second ferroelectric material, and wherein the second conductive oxide fully fills the second gap area;
- a third conductive oxide between a first outer sidewall of the first ferroelectric material and a first outer sidewall of the second ferroelectric material;
- an electrode that abuts the first ferroelectric material and the second ferroelectric material such that the electrode abuts bottom surfaces of the first inverted u-shape of the first ferroelectric material and of the second inverted u-shape of the second ferroelectric material, wherein the electrode couples to the source or the drain of the transistor;
- a fourth conductive oxide that abuts a second outer sidewall of the first ferroelectric material;
- a fifth conductive oxide that abuts a second outer sidewall of the second ferroelectric material;
- and
- a sixth conductive oxide that abuts upper surfaces of the first inverted u-shape of the first ferroelectric material and of the second inverted u-shape of the second ferroelectric material, wherein the sixth conductive oxide abuts portions of the third conductive oxide, the fourth conductive oxide, and the fifth conductive oxide.
13 more elements
A method comprising:
- forming a transistor having a source, a drain, and a gate;
- forming a word-line coupled to the gate;
- forming a bit-line coupled to one of the source or drain of the transistor;
- forming a plate-line;
- and
- forming a capacitive structure coupled to one of the source or drain of the transistor through one or more vias, and to the plate-line, wherein forming the capacitive structure comprises:
- forming a first ferroelectric material having a first inverted u-shape;
- forming a second ferroelectric material having a second inverted u-shape;
- forming a first conductive oxide inside a first gap area of the first inverted u-shape, wherein the first conductive oxide abuts inner sidewalls of the first ferroelectric material, and wherein the first conductive oxide fully fills the first gap area;
- forming a second conductive oxide inside a second gap area of the second inverted u-shape, wherein the second conductive oxide abuts inner sidewalls of the second ferroelectric material, and wherein the second conductive oxide fully fills the second gap area;
- forming a third conductive oxide between a first outer sidewall of the first ferroelectric material and a first outer sidewall of the second ferroelectric material;
- forming an electrode that abuts the first ferroelectric material and the second ferroelectric material such that the electrode abuts bottom surfaces of the first inverted u-shape of the first ferroelectric material and of the second inverted u-shape of the second ferroelectric material, wherein the electrode is coupled to the source or the drain of the transistor;
- forming a fourth conductive oxide that abuts a second outer sidewall of the first ferroelectric material;
- forming a fifth conductive oxide that abuts a second outer sidewall of the second ferroelectric material;
- and
- forming a sixth conductive oxide that abuts upper surfaces of the first inverted u-shape of the first ferroelectric material and of the second inverted u-shape of the second ferroelectric material, and wherein the sixth conductive oxide abuts portions of the third conductive oxide, the fourth conductive oxide, and the fifth conductive oxide.
13 more elements
Dependencies are inferred from the claim text.