Analog-to-digital converter with built-in charge-based capacitance measurements

An analog-to-digital converter (ADC) comprising:

• a timing generator configured to receive a first clock signal;
• an n voltage input port;
• a first plurality of capacitors coupled in parallel to the n voltage input port at a first common node;
• a plurality of drivers each coupled to a respective capacitor opposite the first common node, each driver coupled to a second clock signal to drive the capacitor with the second clock signal;
• a p voltage input port;
• a second plurality of capacitors coupled in parallel to the p voltage input port at a second common node;
• a second plurality of drivers each coupled to a respective capacitor of the second plurality of capacitors opposite the second common node, each driver coupled to a third clock signal to drive the respective capacitor with the third clock signal;
• a first switch coupled to the first common node and configured to couple the first common node to a ground in response to the second clock signal from the timing generator;
• a second switch coupled to the first common node and configured to couple the first common node to a reference voltage in response to a third clock signal from the timing generator;
• a successive logic circuit configured to control each driver to alternately drive the second clock signal to a selected capacitor or to couple the selected capacitor to ground;
• and
• measurement logic including a current sensor to measure a current through the first common node and configured to determine a capacitance of the selected capacitor of the first plurality of capacitors.

A method comprising:

• driving a plurality of capacitors of an analog-to-digital converter (ADC) with a first clock signal through a plurality of drivers each coupled to a respective capacitor;
• coupling a common node to a ground in response to a second clock signal, the common node coupled to each of the plurality of capacitors opposite the respective driver;
• coupling the common node to a reference voltage in response to a third clock signal;
• controlling each driver to alternately drive the first clock signal to a selected capacitor or to couple the selected capacitor to ground;
• and
• measuring a current through the common node to determine a capacitance of the selected capacitor of the plurality of capacitors.