Data detection on serial communication links
AssigneeApple Inc.
InventorsVishal Varma, Dhaval H. Shah, Jose A. Tierno, Sanjeev K. Maheshwari, Sumeet Gupta
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AssigneeApple Inc.
InventorsVishal Varma, Dhaval H. Shah, Jose A. Tierno, Sanjeev K. Maheshwari, Sumeet Gupta
Estimating the term…
A serial data receiver subsystem of a computer system includes a data rate detection circuit and a receiver circuit. The data rate detection circuit is configured to detect that a communication link operates in a high-speed mode rather than in a low-speed mode by detecting that a number of transitions in a serial data stream over a reference period of time exceeds a threshold value. The date rate detection circuit is further configured to activate a data rate detection signal indicating that the communication link operates in the high-speed mode, the data rate detection signal activated in response to detection that the number of transitions in the serial data stream over the reference period of time exceeds the threshold value. The receiver circuit is configured to activate one or more of a plurality of subcircuits included in the receiver circuit in response to activation of the data rate detection signal.
An apparatus, comprising:
A method, comprising:
An apparatus, comprising:
Dependencies are inferred from the claim text.