ADC error compensation using powers of ADC output

A system, comprising:

• an analog-to-digital converter (ADC) including:
• an input terminal configured to receive an analog input signal, and
• an output terminal configured to output a digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal;
• and
• an error correction system connected to the ADC, the error correction system including a first input terminal configured to receive an Nth powered version of the digital signal x, wherein N is a whole number equal to or greater than two, wherein the error correction system is configured to:
• use the Nth powered version of the digital signal x to determine a correction value;
• and
• modify the digital signal x to generate a corrected digital signal by applying the correction value to compensate for analog-to-digital conversion errors occurring within the ADC;
• wherein the ADC is a sigma-delta ADC;
• wherein:
• the sigma-delta ADC is a multi-bit sigma delta ADC;
• the error correction system includes a second terminal configured to receive an Mth powered version of the digital signal x, wherein M is a whole number equal to or greater than two;
• and
• the error correction system is configured to determine the correction value using the Mth powered version of the digital signal x.

A system, comprising:

• an analog-to-digital converter (ADC) including:
• an input terminal configured to receive an analog input signal, and
• an output terminal configured to output a digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal;
• and
• an error correction system connected to the ADC, the error correction system including a first input terminal configured to receive an Nth powered version of the digital signal x, wherein N is a whole number equal to or greater than two, wherein the error correction system is configured to:
• use the Nth powered version of the digital signal x to determine a correction value;
• and
• modify the digital signal x to generate a corrected digital signal by applying the correction value to compensate for analog-to-digital conversion errors occurring within the ADC;
• wherein the ADC has a first bandwidth and further comprising a filter connected between the first input terminal of the error correction system and the error correction system, wherein the filter is configured to attenuate signals having a frequency outside of a second bandwidth.

A system, comprising:

• an analog-to-digital converter (ADC) including:
• an input terminal configured to receive an analog input signal,
• a summing node connected to the input terminal,
• an output terminal configured to output a digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal, and
• a digital-to-analog converter electrically connected between the output terminal and the summing node, wherein the digital-to-analog converter is configured to:
• receive the digital signal from the output terminal;
• and
• convert the digital signal into a second analog signal, wherein the digital signal x includes a polynomial error signal having a form of ax2+bx3+ . . . ;
• and
• an error correction system connected to the ADC, the error correction system including:
• a first input terminal configured to receive a squared version of the digital signal x, and
• a neural network configured to:
• use the squared version of the digital signal x to determine a correction value;
• and
• modify the digital signal x to generate a corrected digital signal by applying the correction value to the digital signal x to compensate for the polynomial error signal generated by the digital-to-analog converter.

A method, comprising:

• receiving a digital signal x from an analog-to-digital converter (ADC) that is configured to receive an analog input signal and output the digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal;
• receiving a Nth powered version of the digital signal x, wherein N is a whole number equal to or greater than two;
• using the Nth powered version of the digital signal x to determine a correction value;
• and
• modifying the digital signal x to generate a corrected digital signal by applying the correction value to compensate for analog-to-digital conversion errors occurring within the ADC;
• wherein the ADC has a first bandwidth and further comprising attenuating signals having a frequency outside of the first bandwidth from the Nth powered version of the digital signal x.

A method, comprising:

• receiving a digital signal x from an analog-to-digital converter (ADC) that is configured to receive an analog input signal and output the digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal;
• receiving a Nth powered version of the digital signal x, wherein N is a whole number equal to or greater than two;
• using the Nth powered version of the digital signal x to determine a correction value;
• and
• modifying the digital signal x to generate a corrected digital signal by applying the correction value to compensate for analog-to-digital conversion errors occurring within the ADC;
• wherein the ADC is a sigma-delta ADC:
• wherein the sigma-delta ADC is a multi-bit sigma delta ADC and further comprising:
• receiving an Mth powered version of the digital signal x, wherein M is a whole number equal to or greater than two;
• and
• determining the correction value using the Mth powered version of the digital signal x.

A method, comprising:

• receiving a digital signal x from an analog-to-digital converter (ADC) that is configured to receive an analog input signal and output the digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal;
• receiving a Nth powered version of the digital signal x, wherein N is a whole number equal to or greater than two;
• using the Nth powered version of the digital signal x to determine a correction value;
• and
• modifying the digital signal x to generate a corrected digital signal by applying the correction value to compensate for analog-to-digital conversion errors occurring within the ADC;
• receiving a parameter from a sensor, wherein the parameter includes at least one of a semiconductor manufacturing related process variation, a voltage, and a temperature;
• and
• determining the correction value using the parameter, wherein the output of the ADC varies as a function of a value of the parameter.