Storage devices with multiple NAND dies
AssigneeSamsung Electronics Co., Ltd.
InventorsIn-Su Kim, Hyun Jin Choi, Alain Tran, Beom Kyu Shin, Woo Seong Cheong
Life of this patent
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Abstract
A memory controller includes an interface and a control module. The interface interfaces with a memory device which includes a plurality of dies that each include a plurality of blocks. The control module groups a plurality of blocks included in different dies and manages the plurality of blocks as a super block. The control module performs scheduling to alternately perform a program on a part of an Nth super block, wherein N is a natural number, and a phased erase on an N+1st super block, and the control module completes the program on the Nth super block and the erase on the Nth super block before the program on the N+1st super block starts.
Claims20
A storage device comprising:
- a memory including a plurality of NAND dies that includes a first die and a second die,
- wherein the first die includes a first block,
- wherein the second die includes a second block, and
- wherein a first super block includes the first block and the second block;
- and
- a controller configured to perform an erase operation on the first die during a first time period, and to perform the erase operation on the second die during a second time period,
- wherein the controller is configured not to perform the erase operation on the second die during the first time period, and
- wherein the controller is configured not to perform the erase operation on the first die during the second time period, and
- wherein the controller is configured to complete the erase operation on the first super block before starting a program operation on the first super block.
A storage device comprising:
- a memory including a plurality of NAND dies that include a first die and a second die,
- wherein the first die includes a first block,
- wherein the second die includes a second block, and
- wherein a first super block includes the first block and the second block;
- and
- a controller configured to perform an erase operation on the first die during a first time period, to perform the erase operation on both the first die and the second die during a second time period, and to perform the erase operation on the second die during a third time period,
- wherein the controller is configured not to perform the erase operation on the second die during the first time period,
- wherein the controller is configured not to perform the erase operation on the first die during the third time period, and
- wherein the controller is configured to complete the erase operation on the first super block before starting a program operation on the first super block.
A storage device comprising:
- a memory including a plurality of NAND dies that include a first die and a second die, wherein the first die includes a first block,
- wherein the second die includes a second block, and
- wherein a first super block includes the first block and the second block;
- and
- a controller configured to perform an erase operation on the first die and perform a program operation on the second die during a first time period, and to perform the erase operation on the second die and perform the program operation on the first die during a second time period,
- wherein the controller is configured not to perform the erase operation on the second die during the first time period, and not to perform the erase operation on the first die during the second time period, and
- wherein the controller is configured to complete the erase operation on the first super block before starting the program operation on the first super block.
Dependencies are inferred from the claim text.