Memory device supporting parallel compression read operation and memory system including the same

A memory device comprising:

• a first memory region connected to first lines and configured to read data from the first memory region in response to a first clock;
• a second memory region connected to second lines and configured to read data from the second memory region in response to a second clock;
• a first transmission unit configured to:
• compress the data read from the first memory region into first compression data, and
• transmit, in response to the first clock, the first compression data through first selection lines among the first lines;
• a second transmission unit configured to:
• compress the data read from the second memory region into second compression data, and
• transmit, in response to the second clock, the second compression data through second selection lines among the second lines;
• and
• a first parallel transmission unit electrically connected to third lines, configured to:
• simultaneously connect the first and second selection lines to the third lines,
• select, as a selection clock, one having a lagging phase to the other between the first and second clocks, and
• transmit the first and second compression data in parallel through the third lines in response to the selection clock.