Circuitry for performing a multiply-accumulate operation
AssigneeCirrus Logic, Inc.
InventorsJohn P. Lesso, John L. Melanson
Life of this patent
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AssigneeCirrus Logic, Inc.
InventorsJohn P. Lesso, John L. Melanson
Estimating the term…
The present disclosure relates to circuitry for performing a multiply-accumulate (MAC) operation. The circuitry comprises a first multiplexer having a plurality of inputs for receiving a plurality of unary-coded input signals representing operands of the MAC operation and an output for outputting a multiplexer output signal representing a result of the MAC operation and a first vector quantizer configured to receive a plurality of weighting signals, each representing a proportion of a computation time period for which a respective one of the unary-coded input signals should be selected by the multiplexer and to output a first selector signal to the multiplexer to cause the multiplexer to select each of the input signals in accordance with the plurality of weighting signals.
Circuitry for performing a multiply-accumulate (MAC) operation, the circuitry comprising:
Stochastic to consecutive edge modulation (CEM) converter circuitry comprising:
Circuitry for performing a multiply-accumulate (MAC) operation, the circuitry comprising multiplexer circuitry configured to output a time division multiplexed output signal comprising portions of a plurality of unary coded multiplexer input signals selected according to a control signal received by the multiplexer circuitry from vector quantizer circuitry;
A device comprising circuitry for performing a multiply-accumulate (MAC) operation, the circuitry comprising:
Dependencies are inferred from the claim text.