Memory die stack chip ID-based command structure
AssigneeMicron Technology, Inc.
InventorHari Giduturi
Life of this patent
Estimating the term…
Abstract
A memory system can include a stack of memory dies such as including a primary die and two or more secondary dies. The primary die can communicate with an external host device and with the secondary dies. In an example, the primary die can issue a command to the secondary dies using a first command message that includes an opcode field specifying a memory operation, a first chip identification field specifying a selected first die of the secondary dies, and one or more operands. In an example, each of the secondary dies receives the same first command message.
Claims20
A system comprising:
- a primary memory component configured to receive instructions from a host device and broadcast commands to multiple secondary memory components using an intra-package interface;
- a first secondary memory component coupled to the primary memory component;
- and
- a second secondary memory component coupled to the first secondary memory component;
- wherein the commands from the primary memory component uniquely address a selected one of the secondary memory components using a message that includes a chip identification field.
A memory system comprising:
- a group of memory components including a primary component and two or more secondary components, wherein the primary component is configured to communicate with a host device and with the secondary components;
- wherein the primary component is configured to provide memory commands to the secondary components using a first command message that includes:
- an opcode field indicating a particular memory operation;
- a first chip identification field indicating a selected first secondary component of the two or more secondary components;
- and
- a payload field comprising one or more operands;
- wherein each of the secondary memory components receives the same first command message.
A method for operating a packaged memory device that includes a primary memory component and multiple secondary components stacked on the primary memory component, the method comprising:
- using the primary memory component, preparing a first command message that includes an opcode field, a first chip identification field, and one or more operands, wherein the first chip identification field specifies a first secondary memory component of the multiple secondary memory components of the packaged memory device;
- using an intra-package bus that communicatively couples the primary memory component and the multiple secondary memory components, broadcasting the first command message to the multiple secondary memory components in the memory device;
- at the first secondary memory component, processing the first command message;
- and
- at the secondary memory components other than the first secondary memory component, ignoring the first command message.
Dependencies are inferred from the claim text.