Offset compensated analog-to-digital converter
AssigneeSemiconductor Components Industries, LLC
InventorsSundaraiah Gurindagunta, Parthasarathy V. Sampath
Life of this patent
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Abstract
An oversampling analog-to-digital converter (ADC) may include a quantizer that adds an offset error to each oversampling sample. If not reduced, the offset error may limit the performance of the ADC. The existing methods to eliminate the offset may increase a circuit size and slow the operation of the ADC. An oversampling ADC that can reduce, or remove, the offset error is disclosed. The disclosed ADC can be small and fast and still remove the offset. Accordingly, the disclosed ADC may be used in high performance applications, such as a high-speed image sensor.
Claims20
A method for compensating for an offset voltage in a sigma-delta ADC, the method comprising:
- replacing an input voltage for a first conversion of a set of conversions, at an input of the sigma-delta ADC, with a reference voltage;
- quantizing the reference voltage, at a quantizer of the sigma-delta ADC, to obtain a dummy sample, the dummy sample including the offset voltage added by the quantizer of the sigma-delta ADC;
- decoupling a decimation filter of the sigma-delta ADC;
- generating a feedback voltage, corresponding to the dummy sample, the feedback voltage including the offset voltage;
- inverting the feedback voltage to generate an inverted feedback voltage;
- applying the inverted feedback voltage to an integrator of the sigma-delta ADC, the inverted feedback voltage including an inverted offset voltage;
- and
- storing the inverted offset voltage in the integrator to generate an offset-charged integrator.
A method for compensating for an offset error in a sigma-delta ADC:
- performing a set of conversions to generate an output sample, wherein for a first conversion of the set of conversions, the method includes:
- replacing an input voltage at an input of the sigma-delta ADC with a reference voltage;
- bypassing an integrator of the sigma-delta ADC;
- quantizing the reference voltage, at a quantizer of the sigma-delta ADC, to obtain a dummy sample, the dummy sample including the offset error added by the quantizer of the sigma-delta ADC;
- and
- applying the dummy sample to a decimation filter configured to store the offset error to generate an offset-compensated decimation filter, the offset-compensated decimation filter configured to subtract the offset error added by the quantizer of the sigma-delta ADC for conversions other than the first conversion of the set of conversions.
A sigma-delta ADC comprising:
- a sigma-delta modulator including:
- an integrator configured to store a difference between an input voltage and a feedback voltage;
- and
- a quantizer configured to generate an oversampling sample based on an integrator-output voltage of the integrator, the oversampling sample including an offset error;
- a decimation filter coupled to an output of the sigma-delta modulator and configured to receive the oversampling sample from the quantizer;
- and
- control logic configured by instructions and/or logic circuitry to:
- configure the sigma-delta modulator to perform a set of conversions to generate an output sample;
- replace, for a first conversion of the set of conversions, the input voltage with a zero voltage;
- and
- decouple, for the first conversion of the set of conversions, the decimation filter from the quantizer so that the feedback voltage from the output of the quantizer is an offset voltage corresponding to the offset error, the offset voltage being stored in the integrator.
Dependencies are inferred from the claim text.