Diode connected non-linear input capacitors based majority gate

Abstract

A logic gate includes a first capacitor to receive a first input, the first capacitor coupled to a node and a first diode structure coupled to the first input and the node. The logic gate future includes a second capacitor to receive a second input, the second capacitor coupled to the node and a second diode structure coupled to the second input and the node. The logic gate further includes a third capacitor to receive a third input, wherein the third capacitor is coupled to the node and a third diode structure coupled to the third input and the node.

Dependencies are inferred from the claim text.