Control circuit, method and system
AssigneeNuvoton Technology Corporation
InventorsTse-Yen Liu, Yu-Jen Chang
Life of this patent
Estimating the term…
Abstract
A control circuit including a quadrature encoder circuit, a counter circuit, and a cutoff circuit is provided. The quadrature encoder circuit generates a first edge signal and a first direction signal according to a first external signal and a second external signal. The counter circuit performs a counting operation according to the first edge signal and the first direction signal. In response to the timer signal being enabled, the cutoff circuit prevents the first edge signal and the first direction signal from entering the counter circuit and provides a second edge signal and a second direction signal to the counter circuit so that the counter circuit performs the counting operation according to the second edge signal and the second direction signal.
Claims15
A control circuit comprising:
- a quadrature encoder circuit generating a first edge signal and a first direction signal according to a first external signal and a second external signal;
- a counter circuit performing a counting operation according to the first edge signal and the first direction signal;
- and
- a first cutoff circuit,
- wherein in response to a timer signal being enabled, the first cutoff circuit prevents the first edge signal and the first direction signal from entering the counter circuit and the counter circuit performs the counting operation according to a system clock.
A control system controlling the operation of a motor and comprising:
- a quadrature encoder circuit generating a first edge signal and a first direction signal according to a first external signal and a second external signal;
- a counter circuit performing a counting operation according to the first edge signal and the first direction signal to adjust a count value;
- a first cutoff circuit, wherein in response to a timer signal being enabled, the first cutoff circuit prevents the first edge signal and the first direction signal from entering the counter circuit and the counter circuit performs the counting operation according to a system clock;
- and
- a central processing unit (CPU) coupled to the counter circuit,
- wherein in response to the timer signal being enabled and the count value reaching a target value, the counter circuit sends an interrupt signal to interrupt the operation of the CPU.
Dependencies are inferred from the claim text.