NAND flash memory device capable of selectively erasing one flash memory cell and operation method thereof
AssigneesSK hynix Inc., Seoul National University R&Db Foundation
InventorsHonam Yoo, Jong-Ho Lee
Life of this patent
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AssigneesSK hynix Inc., Seoul National University R&Db Foundation
InventorsHonam Yoo, Jong-Ho Lee
Estimating the term…
A flash memory device includes a cell array and a control circuit. The cell array includes a first NAND string having first flash memory cells having control gates respectively connected to word lines, and a first bit line selection switch connecting the first flash memory cells to a first bit line according to a control of a first string selection line. The control circuit controls a first erase operation for erasing a selected flash memory cell. The control circuit controls a voltage difference between the first bit line and the first string selection line to have a first value for generating gate induced drain leakage (GIDL) at the first bit line selection switch, and controls a voltage of a control gate of the selected flash memory cell and a voltage of a control gate of an unselected flash memory cell to be different from each other.
A flash memory device comprising:
An operation method of a flash memory device, the method comprising:
An operation method of a flash memory device, the method comprising:
Dependencies are inferred from the claim text.