Resistive memory device and method of operating the resistive memory device
AssigneeSK hynix Inc.
InventorIn Ku Kang
Life of this patent
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Abstract
Provided herein may be a resistive memory device and a method of operating the resistive memory device. The resistive memory device may include strings coupled between one or more source lines and one or more bit lines, each string including a set of one or more resistive memory cells, one or more word lines respectively coupled to the set of one or more resistive memory cells; and a voltage generator configured to control a level of a turn-on voltage to be applied to one or more unselected word lines among the one or more word lines depending on a program target state of a subset of resistive memory cells including one or more resistive memory cells selected from among the set of one or more resistive memory cells.
Claims15
A resistive memory device, comprising:
- strings respectively coupled between source lines and bit lines, wherein the strings include source select transistors respectively coupled to the source lines, drain select transistors respectively coupled to the bit lines, and resistive memory cells between the drain select transistors and the source select transistors;
- word lines coupled to the resistive memory cells;
- a source select line coupled to the source select transistors;
- a drain select line coupled to the drain select transistors;
- page buffers configured to selectively apply a set voltage to bit lines coupled to selected resistive memory cells among the resistive memory cells;
- and
- a voltage generator configured to control a level of a turn-on voltage applied to the source select line depending on a program target state of the selected resistive memory cells.
A method of operating a resistive memory device during a program operation performed on resistive memory cells coupled between source select transistors respectively coupled to source lines and drain select transistors respectively coupled to bit lines, the method comprising:
- applying a ground voltage to the source lines and applying a set voltage greater than the ground voltage to bit lines selected from among the bit lines;
- applying a turn-off voltage to a selected word line coupled to resistive memory cells selected from among the resistive memory cells;
- applying a turn-on voltage, a level of which is controlled depending on a program target state of the selected resistive memory cells, to a source select line coupled to the source select transistors;
- and
- applying a voltage having a greatest level of the turn-on voltage to unselected word lines coupled to unselected resistive memory cells among the resistive memory cells.
Dependencies are inferred from the claim text.