Systems and methods for monitoring and managing memory devices

A method for managing a memory device, comprising:

• powering up the memory device, the memory device comprising a two-layer orthogonal error correction code (ECC);
• reading a first set of bits from a mini-array into one or more registers;
• determining whether there is an ECC fail in the first set of bits;
• in response to determining there is not an ECC fail in the first set of bits, determining that the memory device is ready for normal operation, or in response to determining there is an ECC fail in the first set of bits, determining if the ECC fail is a one-bit fail, a two-bit fail, or a three-bit fail.

A method for managing a memory device, comprising:

• providing a memory bank, the memory device comprising a two-layer orthogonal error correction code (ECC);
• receiving a write command to write a page in the memory bank, the page having a page address;
• identifying an actual page address, wherein the actual page address is a regular page address or the actual page address is a mapped page address;
• detecting an error correction code (ECC) fail at the actual page address;
• identifying that the actual page address is included in a threshold error detection (TED) table;
• determining that the actual page address is included in the TED table a threshold error value number of times;
• generating a new repair row and writing the write command in the new repair row, based on determining that the actual page address is included in the TED table a threshold error value number of times;
• and
• updating a built-in self-repair (BISR) map table to include the new repair row.