Signal quality optimization method and a signal quality optimization system
AssigneeRealtek Semiconductor Corp.
InventorsMing-Sheng Peng, Ting-Ying Wu, Shih-Hung Wang, Wei-Zhi Chen
Life of this patent
Estimating the term…
Loading patent…
AssigneeRealtek Semiconductor Corp.
InventorsMing-Sheng Peng, Ting-Ying Wu, Shih-Hung Wang, Wei-Zhi Chen
Estimating the term…
A signal quality optimization system and a signal quality optimization method are provided. The method includes: executing a ZQ calibration process on an off-chip driver (OCD) circuit of a first circuit and an on-die termination (ODT) circuit of a second circuit to obtain calibrated resistor quantities; performing a waveform test process, including: setting a predetermined time rule to determine an operation success condition, adjusting the OCD circuit according to the calibration calibrated quantity corresponding to a target ODT resistance, obtaining a signal eye diagram, and obtaining an adjustable resistor ratio by performing adjustments and tests; extracting the OCD resistance value with the highest adjustable resistor ratio to obtain preferred ODT-OCD resistance combinations; and configuring the ODT circuit and the OCD circuit according to the preferred ODT-OCD resistance combinations, and testing the preferred ODT-OCD resistance combinations to obtain an optimized ODT-OCD resistance combination according to test results.
A signal quality optimization method applicable to a first circuit and a second circuit electrically connected to each other, and the signal quality optimization method comprising:
A signal quality optimization system, comprising:
Dependencies are inferred from the claim text.