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US 12,437,787 B2Granted
Threshold compensated detector for memory sense
AssigneeMicron Technology, Inc.
InventorsFerdinando Bedeschi, Umberto Di Vincenzo, Michele Maria Venturini
Life of this patent
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Abstract
A detection circuit may be configured to receive an input signal indicative of a data state and to detect the data state using charge sharing between two capacitors to achieve detection with threshold compensation. The detection circuit may include semi-latch circuitry and boosting circuitry to expedite the detection, thereby achieving high speed at low power consumption and low circuit size.
Claims20
An electronic device, comprising:
- a detection circuit configured to receive an input signal indicative of a data state and to detect the data state, the detection circuit including:
- a power supply voltage node to receive a power supply voltage;
- a reference node to provide a power supply reference level;
- and
- charge sharing circuitry including:
- a first capacitor having a first terminal and a second terminal;
- a first switch coupled between the power supply voltage node and the first terminal of the first capacitor, the first switch configured to receive a first switch signal and to be driven by first switch signal to charge the first capacitor;
- a second capacitor having a first terminal and a second terminal, the second terminal of the second capacitor coupled to the reference node;
- a second switch coupled between the first terminal of the second capacitor and the reference node, the second switch configured to receive a second switch signal and to be driven by the second switch signal to discharge the second capacitor;
- and
- a third switch coupled between the first terminal of the first capacitor and the first terminal of the second capacitor, the third switch configured to be driven by the input signal to detect the data state using charge sharing between the first capacitor and the second capacitor,
- wherein a voltage at the first terminal of the second capacitor is indicative of the data state.
9 more elements
An electronic circuit, comprising:
- an input node to receive an input signal indicative of a data state;
- a power supply voltage node to receive a power supply voltage;
- a first switch node to receive a first switching signal;
- a second switch node to receive a second switching signal;
- a ground node to provide a power supply ground level;
- and
- charge sharing circuitry including:
- a first transistor being a p-channel metal-oxide-semiconductor field-effect transistor having a first drain, a first source coupled to the power supply voltage node, and a first gate coupled to the first switch node;
- a first capacitor having a first terminal and a second terminal, the first terminal coupled to the first drain;
- a second transistor being an n-channel metal-oxide-semiconductor field-effect transistor having a second drain, a second source coupled to the ground node, and a second gate coupled to the second switch node;
- a second capacitor formed by a parasitic capacitance at the second drain;
- and
- a third transistor being a p-channel metal-oxide-semiconductor field-effect transistor having a third drain coupled to the second drain, a third source coupled to the first drain, and a third gate coupled to the input node.
10 more elements
A method, comprising:
- charging a first capacitor to a power supply voltage level by driving a first switch coupled between the first capacitor and a power supply voltage using a first switching signal;
- discharging a second capacitor to a reference level by driving a second switch coupled between the second capacitor and a reference potential using a second switching signal;
- receiving an input signal indicative of a data state, the input signal having an input voltage level;
- discharging the first capacitor to a voltage level being a sum of the input voltage level and a threshold voltage level;
- and
- driving a third switch coupled between the first capacitor and the second capacitor using the input signal, wherein the second capacitor remains discharged when the third switch is open and the second capacitor is electrically connected to the first capacitor for charge sharing between the first capacitor and the second capacitor when the third switch is closed,
- wherein a voltage on the second capacitor indicates the data state following a settling time.
4 more elements
Dependencies are inferred from the claim text.