Data processing apparatus, chip, and data processing method
AssigneeStream Computing Inc.
InventorsFei Luo, Weiwei Wang
Life of this patent
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Abstract
Disclosed is a data processing apparatus, chip, and data processing method. The data processing apparatus includes: a plurality of processing cores having a preset execution sequence, the plurality of processing cores including a head processing core and at least one other processing core; wherein the head processing core is configured to send an instruction, and receive and execute a program obtained according to the instruction; and each of the other processing cores is configured to receive and execute a program sent by a previous processing core in the preset execution sequence.
Claims18
A data processing apparatus, comprising:
- a plurality of processing cores having a preset execution sequence, the plurality of processing cores including a head processing core and at least one other processing core;
- and
- a synchronization generator, configured to generate a synchronization signal after receiving a synchronization request signal sent by each of the plurality of processing cores, and send the synchronization signal to each of the processing cores;
- wherein in a cycle of a current synchronization signal:
- the head processing core is configured to send an instruction according to the synchronization signal, and receive and execute a program obtained according to the instruction;
- and
- each of the at least one other processing cores is configured to receive and execute a program sent by a respective previous processing core in the preset execution sequence, wherein the program sent by the respective previous processing core has been executed by the respective previous processing core in a cycle of a previous synchronization signal.
A data processing method, applicable in a data processing apparatus, the data processing apparatus comprising:
- a plurality of processing cores with a preset execution sequence, the plurality of processing cores comprising a head processing core and at least one other processing core;
- and
- a synchronization generator, configured to generate a synchronization signal after receiving a synchronization request signal sent by each of the plurality of processing cores, and send the synchronization signal to each of the plurality of processing cores;
- wherein the data processing method comprises, in a cycle of a current synchronization signal:
- sending an instruction according to the synchronization signal, and receiving and executing a program obtained according to the instruction, by the head processing core;
- and
- receiving and executing a program sent by a respective previous processing core in the preset execution sequence, by each of the at least one other processing core, wherein the program sent by the respective previous processing core has been executed by the respective previous processing core in a cycle of a previous synchronization signal.
Dependencies are inferred from the claim text.