Manufacture of power MOSFETs

A semiconductor device comprising a unit cell, the unit cell comprising:

• a first conductivity type source region formed self-aligned within a second conductivity type first well region;
• a source trench extending through the first conductivity type source region and through at least a portion of the second conductivity type first well region, wherein the source trench is defined between a first vertical sidewall and a second vertical sidewall;
• a second conductivity type plug region positioned below the second conductivity type first well region and defined between a left boundary and a right boundary, wherein the first vertical sidewall is aligned with the left boundary and wherein the second vertical sidewall is aligned with the right boundary;
• and a silicide layer in contact with the first vertical sidewall and the second vertical sidewall;
• wherein an active region is defined on a left side of a vertically oriented boundary extending through a thickness of the unit cell and a peripheral region is defined on a right side of the vertically oriented boundary, wherein the active region comprises a channel through which current carriers passes and wherein the source trench is entirely defined within the active region.