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US 12,432,041 B2Granted
Codeword synchronization method, receiver, network device, and network system
AssigneeHuawei Technologies Co., Ltd.
InventorsHao Ren, Xiang He, Xinyuan Wang
Life of this patent
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Abstract
A codeword synchronization method includes determining a candidate in a plurality of bits of a data sequence received by a receive end, and determining a synchronization position based on the candidate bit, where the synchronization position indicates a start position of a codeword in the data sequence.
Claims30
A codeword synchronization method, comprising:
- receiving a data sequence, wherein the data sequence comprises a plurality of bits;
- determining a candidate bit from among the plurality of bits based on a characteristic value of at least one group of first test data blocks, wherein each group of the at least one group of the first test data blocks comprises multiple first test data blocks, and wherein an interval between a start position of each first test data block in a first group of the at least one group of the first test data blocks and the candidate bit is an integer multiple of a length of a codeword;
- and
- determining a synchronization position based on the candidate bit,
- wherein the synchronization position indicates a start position of a codeword in the data sequence.
2 more elements
A communication device comprising:
- at least one memory;
- and
- at least one processor coupled to the at least one memory and configured to:
- receive a data sequence, wherein the data sequence comprises a plurality of bits;
- determine a candidate bit from among the plurality of bits based on a characteristic value of at least one group of first test data blocks, wherein each group of the at least one group of the first test data blocks comprises multiple first test data blocks, and wherein an interval between a start position of each first test data block in a first group of the at least one group of the first test data blocks and the candidate bit is an integer multiple of a length of a codeword;
- and
- determine a synchronization position based on the candidate bit, wherein the synchronization position indicates a start position of a codeword in the data sequence.
4 more elements
A chip, comprising:
- at least one processor,
- wherein the at least one processor is configured to:
- receive a data sequence, wherein the data sequence comprises a plurality of bits;
- determine a candidate bit from among the plurality of bits based on a characteristic value of at least one group of first test data blocks, wherein each group of the at least one group of the first test data blocks comprises multiple first test data blocks, and wherein an interval between a start position of each first test data block in a first group of the at least one group of the first test data blocks and the candidate bit is an integer multiple of a length of a codeword;
- and
- determine a synchronization position based on the candidate bit, wherein the synchronization position indicates a start position of a codeword in the data sequence.
3 more elements
Dependencies are inferred from the claim text.