Methods and devices for selecting a desired sub-harmonic of a high-frequency clock

A circuit for suppressing undesired sub-harmonics comprising:

• a plurality of mixers, wherein mixers of the plurality of mixers are connected in parallel;
• a plurality of local oscillator signals (LO), wherein each of the plurality of LOs is associated with a phase of a driving clock and one of the plurality of mixers;
• an input to receive a plurality of phases of the driving clock, wherein each of the plurality of phases is equally spaced within a 360 degree phase space, and wherein each phase of the driving clock is distributed to one of the plurality of mixers;
• and
• wherein the plurality of mixers is configured to suppress one or more of a plurality of undesired phases of the driving clock and amplify a desired phase of the driving clock and to generate baseband signal components directed in a same direction, each of the components based on one of the plurality of phases and wherein the components are added to form a baseband signal.