Electronic devices having wireless transceivers with reference clock selection

A wireless transceiver configured to convey a signal at a first frequency using an antenna, the wireless transceiver comprising:

• a first mixer configured to convert the signal between the first frequency and a second frequency lower than the first frequency;
• a second mixer configured to convert the signal between the second frequency and a third frequency lower than the second frequency;
• a first phase-locked loop (PLL) having an output coupled to the first mixer;
• a second PLL having an output coupled to the second mixer;
• a third PLL having an output coupled to an input of the first PLL;
• and
• a switch coupled between the output of the third PLL and an input of the second PLL, the switch having a state that is based on an injection mode of the first mixer.

A method of operating circuitry, the method comprising:

• generating, using a reference oscillator, a first clock signal;
• upconverting, using a first phase-locked loop (PLL), the first clock signal to produce a second clock signal;
• upconverting, using a second PLL, the second clock signal to produce a third clock signal;
• mixing, using a first mixer, a first signal with the third clock signal, the third clock signal being higher in frequency than the first signal;
• upconverting, using a third PLL, the second clock signal to produce a fourth clock signal lower in frequency than the third clock signal;
• coupling, using a switch, an input of the third PLL to an output of the reference oscillator or an output of the first PLL;
• and
• mixing, using a second mixer, the signal with the fourth clock signal.