Method of fabricating a semiconductor structure with improved dicing properties

A method of fabricating a semiconductor structure, the method comprising:

• defining a circuit area and a dicing area on a silicon wafer;
• forming a first metal layer over the silicon wafer;
• forming a barrier layer over an area of a top surface of the first metal layer located above the circuit area of the silicon wafer;
• forming a second metal layer over the first metal layer;
• forming a first porous structure in a first region of the second metal layer located above the circuit area and a second porous structure in a second region of the second metal layer located above the dicing area, wherein the first porous structure includes a first set of pores that extend from a top surface of the first porous structure to the barrier layer, and wherein the second porous structure includes a second set of pores that extend from a top surface of the second porous structure to the silicon wafer;
• forming a metal-insulator-metal stack in the first set of pores of the first porous structure;
• and
• etching the second set of pores of the second porous structure to expose the dicing area of the silicon wafer.