Ferroelectric tunnel junction memory devices with enhanced read window

A memory device, comprising:

• a first capacitor comprising:
• a first metal structure;
• a second metal structure;
• and
• a ferroelectric film interposed between the first and second metal structures;
• a second capacitor comprising:
• a third metal structure;
• a fourth metal structure;
• and
• a dielectric film interposed between the third and fourth metal structures;
• and
• a transistor comprising:
• a gate;
• a first drain/source;
• and
• a second drain/source;
• wherein the second metal structure is in electrical contact with the gate of the transistor and the third metal structure of the second capacitor;
• and
• wherein the first drain/source is connected to a corresponding one of a plurality of first access lines, the first metal structure is connected to a corresponding one of a plurality of second access lines, and the second drain/source and the fourth metal structure are connected to a corresponding one of a plurality of third access lines.