Semiconductor structure, method for manufacturing semiconductor structure, and memory

A memory device, comprising at least one semiconductor structure, wherein the at least one semiconductor structure comprises:

• a plurality of first semiconductor pillars, a plurality of second semiconductor pillars, a first support layer, a storage structure, and a plurality of transistors,
• wherein the plurality of first semiconductor pillars are arranged in an array in a first direction and in a second direction, each of the first direction and the second direction is perpendicular to an extending direction of each of the plurality of first semiconductor pillars, and the first direction intersects with the second direction;
• wherein the first support layer covers sidewalls of top portions of the plurality of first semiconductor pillars;
• wherein each of the plurality of second semiconductor pillars is arranged on and in contact with a respective one of the plurality of first semiconductor pillars, and the storage structure is arranged around sidewalls of the plurality of first semiconductor pillars and sidewalls of lower portions of the plurality of second semiconductor pillars;
• and
• wherein a channel structure of each of the plurality of transistors is arranged in an upper portion of a respective one of the plurality of second semiconductor pillars, and an extending direction of the channel structure is perpendicular to a plane where the first direction and the second direction are located,
• wherein each of the plurality of transistors comprises:
• a gate structure arranged around a portion of a sidewall of the upper portion of the respective of the plurality of second semiconductor pillars;
• a source arranged in the upper portion of the respective one of the plurality of second semiconductor pillars and arranged at one end of the channel structure;
• and
• a drain arranged in the upper portion of the respective one of the plurality of second semiconductor pillars and arranged at another end of the channel structure.

A method for manufacturing a semiconductor structure, comprising:

• providing a first semiconductor base, and forming a first active layer on the first semiconductor base, wherein the first active layer comprises a plurality of first semiconductor pillars arranged in an array in a first direction and in a second direction, each of the first direction and the second direction is perpendicular to an extending direction of each of the plurality of first semiconductor pillars, and the first direction intersects with the second direction;
• forming a first support layer on a top portion of the first active layer;
• forming a second semiconductor base on the first active layer and the first support layer;
• removing a portion of the second semiconductor base to form a second active layer, wherein the second active layer comprises a plurality of second semiconductor pillars, and each of the plurality of second semiconductor pillars is arranged on and in contact with a top surface of a respective one of the plurality of first semiconductor pillars;
• forming a second support layer on a top portion of the second active layer;
• forming a storage structure on sidewalls of the plurality of first semiconductor pillars and on sidewalls of lower portions of the plurality of second semiconductor pillars;
• and
• forming a gate structure on at least one side of a portion of a sidewall of an upper portion of each of the plurality of second semiconductor pillars.