Error correction code decoder using constacyclic code, and memory device and memory system including the same

A memory system comprising:

• a memory module including a plurality of memory devices;
• and
• a memory controller including a system error correction code (ECC) engine and configured to control the memory module,
• wherein the system ECC engine includes a system ECC decoder configured to perform an ECC decoding,
• wherein the system ECC decoder includes:
• a first syndrome generator configured to generate first global syndrome data and first local syndrome data using a codeword set provided from the memory module and a first parity check matrix based on a constacyclic code;
• and
• a first burst error corrector configured to correct a correctable error included in the codeword set using the first global syndrome data and the first local syndrome data,
• wherein the codeword set includes a plurality of data bits arranged along a first direction and a second direction,
• wherein the plurality of data bits include a plurality of symbols each symbol including two or more consecutive data bits along the first direction,
• wherein errors of the codeword set includes a single burst error and a multi-bit error,
• wherein the single burst error occurs on two or more symbols arranged along the first direction, and the multi-bit error randomly occurs on two or more data bits of the plurality of data bits, and
• wherein the system ECC decoder is configured to simultaneously correct the single burst error and detect the multi-bit error.

A memory device comprising:

• a memory cell array;
• and
• an error correction code (ECC) decoder configured to perform an ECC decoding on read data provided from the memory cell array,
• wherein the ECC decoder includes:
• a syndrome generator configured to generate global syndrome data and local syndrome data using the read data provided from the memory cell array and a parity check matrix based on a constacyclic code;
• and
• a burst error corrector configured to correct a correctable error included in the read data using the global syndrome data and the local syndrome data, wherein the read data includes a plurality of data bits arranged along a first direction and a second direction,
• wherein the plurality of data bits include a plurality of symbols each symbol including two or more consecutive data bits along the first direction,
• wherein errors of the read data include a single burst error and a multi-bit error,
• wherein the single burst error occurs on two or more symbols arranged along the first direction, and the multi-bit error randomly occurs on two or more data bits of the plurality of data bits, and
• wherein the ECC decoder is configured to simultaneously detect the single burst error and the multi-bit error.