Reception circuit and smart card including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsMinhyeok Kang, Sanghyo Lee
Life of this patent
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Abstract
The present disclosure provides systems and devices including reception circuits for communications between smart cards and card readers. In some embodiments, a reception circuit of a smart card includes a first circuit and a second circuit. The first circuit is configured to receive a wireless signal including a pause, and restore the wireless signal to a clock signal. The second circuit is configured to charge a voltage of a first node based on a first logic level of the clock signal, compare the voltage of the first node with a predefined reference voltage, and output, based on the comparison of the voltage of the first node, a synchronization signal indicating a rising starting time point of the pause of the wireless signal.
Claims19
A reception circuit of a smart card, comprising:
- a first circuit configured to:
- receive a wireless signal comprising a plurality of pauses;
- and
- restore the wireless signal to a clock signal;
- and
- a second circuit configured to:
- charge a voltage of a first node based on a first logic level of the clock signal;
- compare the voltage of the first node with a reference voltage of a first level;
- and
- output, based on the comparison of the voltage of the first node, a synchronization signal indicating a rising starting time point of a last pause of the plurality of pauses of the wireless signal, the last pause corresponding to an end bit of the wireless signal,
- wherein the synchronization signal transitions from a first logic level to a second logic level at the rising starting time point of the last pause of the plurality of pauses and maintains the second logic level at rising starting time points of remaining pauses of the plurality of pauses.
A smart card, comprising:
- an antenna configured to transmit a first wireless signal and receive a second wireless signal;
- and
- a smart card chip configured to:
- receive, from the antenna, the second wireless signal comprising a plurality of pauses;
- output a clock signal based on the second wireless signal;
- generate a node voltage based on a logic level of the clock signal;
- compare the node voltage with a reference voltage of a first level;
- output a synchronization signal that is activated based on whether the node voltage is greater than the reference voltage, the synchronization signal indicating a rising starting time point of a last pause of the plurality of pauses, the last pause corresponding to an end bit of the second wireless signal;
- and
- demodulate the synchronization signal to generate a demodulation signal,
- wherein the synchronization signal transitions from a first logic level to a second logic level at the rising starting time point of the last pause of the plurality of pauses and maintains the second logic level at rising starting time points of remaining pauses of the plurality of pauses.
A smart card system, comprising:
- a reader configured to transmit a wireless signal comprising a plurality of pauses;
- and
- a smart card configured to:
- receive the wireless signal;
- restore the wireless signal to a clock signal;
- and
- output a synchronization signal indicating a rising starting time point of a last pause of the plurality of pauses based on the clock signal maintaining a first logic level during a predetermined period of time and transitions to a second logic level different from the first logic level, the last pause corresponding to an end bit of the wireless signal,
- wherein the synchronization signal transitions from a third logic level to a fourth logic level at a rising starting time point of the last pause of the plurality of pauses and maintains the fourth logic level at rising starting time points of remaining pauses of the plurality of pauses.
Dependencies are inferred from the claim text.