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US 12,422,872 B2Granted
Fast settling voltage regulator
AssigneeAdvanced Micro Devices, Inc.
InventorLuca Ravezzi
Life of this patent
Estimating the term…
Abstract
The disclosed voltage regulator circuit includes an NMOS as the main power device that is coupled to a regulated voltage output. A sensing circuit senses the regulated voltage output, and a reference voltage circuit supplies a correct bias to the flipped-source follower, which amplifies the sensed voltage output. A voltage inversion circuit such as a current mirror provides an inverting gain stage for the sensed voltage output, for driving the NMOS. Various other methods, systems, and computer-readable media are also disclosed.
Claims20
A voltage regulator circuit comprising:
- a negative-channel metal-oxide semiconductor (NMOS) coupled to a regulated voltage output of the voltage regulator circuit;
- a sensing circuit for sensing the regulated voltage output;
- a reference voltage circuit for supplying a correct bias voltage to the sensing circuit;
- and
- a voltage inversion circuit coupled between the sensing circuit and the NMOS, wherein the voltage inversion circuit lacks a resistor.
2 more elements
A device comprising:
- a negative-channel metal-oxide semiconductor (NMOS) coupled to a regulated voltage output of a voltage regulator circuit;
- a flipped-source follower circuit coupled between a reference voltage circuit and the NMOS for sensing the regulated voltage output;
- the reference voltage circuit for supplying a correct bias to the flipped-source follower circuit;
- and
- a voltage inversion circuit coupled between the flipped-source follower circuit and the NMOS, wherein the voltage inversion circuit lacks a resistor.
2 more elements
A method comprising:
- sensing, by a sensing circuit coupled between a reference voltage circuit for supplying a reference voltage and a voltage regulator circuit comprising a negative-channel metal-oxide semiconductor (NMOS) directly coupled to a voltage output of the voltage regulator circuit, the voltage output;
- providing an inverted signal by inverting and amplifying, via a voltage inversion circuit coupled between the sensing circuit and the NMOS, the sensed voltage output from the sensing circuit, wherein the voltage inversion circuit lacks a resistor;
- and
- outputting, via the NMOS, a regulated voltage output based on the inverted signal.
1 more element
Dependencies are inferred from the claim text.