US 12,422,480 B1 · Detecting hardware errors

Abstract

Hardware errors can be detected by generating a plurality of test templates to perform testing on an integrated circuit (IC) device. A set of random tests can be generated corresponding to the plurality of test templates. The set of random tests can be executed on the IC device for multiple passes, and the results of the multiple passes can be compared to detect the hardware error in the IC device. The set of random tests can be generated as a binary image for execution on the IC device. The IC device may include multiple processing cores, and executing the multiple passes may include changing logical role of each processing core between subsequent passes. The set of random tests can be executed in a bare-metal mode, or at an application level of the IC device.

Claims20

Dependent claims

A method for detecting hardware errors in an integrated circuit (IC) device that includes a plurality of processing cores, comprising:

generating a plurality of test templates, wherein each test template includes a set of instructions to create scenarios for detection of the hardware errors;
periodically generating a binary image that includes a plurality of random tests corresponding to the plurality of test templates;
and
for each binary image:
executing the binary image on the IC device for a first pass;
storing a result of the first pass as a golden result;
executing the binary image on the IC device in subsequent passes by changing logical roles of which processor core executes which test in each pass to have each processor core execute a test previously executed by another processor core;
and
comparing results of the subsequent passes against the golden result to detect a hardware error in the IC device.

6 more elements

Dependencies are inferred from the claim text.

Detecting hardware errors

Life of this patent

Detecting hardware errors

Life of this patent

Abstract

Claims20