Co-debug of processing conditions of logic devices

A computer system for facilitating processing within a computing environment, the computer system comprising:

• at least one computing device;
• a set of one or more computer readable storage media;
• and
• program instructions, collectively stored in the set of one or more computer readable storage media, for causing the at least one computing device to perform the following computer operations including:
• automatically identifying a multiplexer logic device in a hardware definition language of a design;
• generating one or more verification properties of the multiplexer logic device to be used in validation of a selected processing condition of the multiplexer logic device;
• providing as input to a formal verification technique the one or more verification properties and one or more constraints obtained from software and hardware information relating to the multiplexer logic device;
• performing verification using the formal verification technique to validate the selected processing condition;
• and
• performing debugging of the multiplexer logic device, based on the performing verification indicating a failure to comply with the selected processing condition.

A computer program product for facilitating processing within a computing environment, the computer program product comprising:

• a set of one or more computer readable storage media;
• and
• program instructions, collectively stored in the set of one or more computer readable storage media, for causing at least one computing device to perform the following computer operations including:
• automatically identifying a multiplexer logic device in a hardware definition language of a design;
• generating one or more verification properties of the multiplexer logic device to be used in validation of a selected processing condition of the multiplexer logic device;
• providing as input to a formal verification technique the one or more verification properties and one or more constraints obtained from software and hardware information relating to the multiplexer logic device;
• performing verification using the formal verification technique to validate the selected processing condition;
• and
• performing debugging of the multiplexer logic device, based on the performing verification indicating a failure to comply with the selected processing condition.