Scalable receiver architecture for silicon photonic links
AssigneeIntel Corporation
InventorsItamar Levin, Adee Ofir Ran
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AssigneeIntel Corporation
InventorsItamar Levin, Adee Ofir Ran
Estimating the term…
Sampling circuitry for receiving an analog signal from photodetector circuitry and generating a sample analog signal. Equalization circuitry for generating an equalized signal comprising first and second sample values corresponding with a cursor tap and a first postcursor tap, and one or more third sample values corresponding with taps other than the cursor tap and the first postcursor tap. In the equalized signal, amplitudes of the first and second sample values are substantially equal while the third sample values are attenuated relative to the first and second sample values. The first and second sample values correspond with two or more first symbols of a first alphabet. Data slicer and modulo circuitry to generate a data signal based on the equalized signal and perform a modulo operation on the two or more first symbols and to generate one or more second symbols. The second symbols are according to a second alphabet.
An apparatus comprising:
An apparatus comprising:
A system comprising:
Dependencies are inferred from the claim text.