Communication device with low density parity check rotator, and method therefor

A communication device comprising:

• a low density parity check, LDPC, rotator circuit having an input and an output, wherein the LDPC rotator circuit is configured to have a parallelism, P, of at least two, and configured to perform a rotation function comprising a series of operations that rotates a data sequence comprising a first number, Z, of data values by a second number, R, of positions, wherein a series of ceil (Z/P) input blocks each comprising P number of input values is accepted by the input during a first subset of the series of operations, and wherein a series of ceil (Z/P) output blocks each comprising P number of output values are provided by the output during a second subset of the series of operations, wherein the second subset of operations begins before the first subset of operations has completed;
• wherein the LDPC rotator circuit comprises, or is operably coupled to, a controller arranged to control the rotation function performed by the LDPC rotator circuit;
• and wherein the LDPC rotator circuit comprises:
• a first set of one or more registers that is written with one or more registered values that are derived from one or more input values that are accepted by the input during one or more of:
• previous operations, current operations;
• a second set of one or more registers operably coupled to the controller;
• at least one shifting circuit, operably coupled to the controller, configured to receive shifting input values that are derived from the P number of input values and apply a left shift and apply a right shift in order to provide shifting output values;
• and
• at least one combining circuit that combines shifting output values originating from the at least one shifting circuit;
• and configured to provide the P number of output values to the output;
• wherein a number floor (Z/P) of the series of ceil (Z/P) input blocks comprise input values that are provided by a number P of the Z data values and one input block of the series of ceil (Z/P) input blocks is a padded input block that comprises input values that are provided by a number mod (Z,P) of the Z data values and a number P-mod (Z,P) of padding values when Z is not a multiple of P;
• and
• wherein the second set of one or more registers is written under direction of the controller with one or more registered values that are derived from one or more input values that are accepted by the input before a second subset of the series of operations begins and wherein the one or more registered values are not overwritten before the padded input block is accepted by the input, and at least one of the P output values in at least one of the output blocks-is a function of at least one registered value in the second set of one or more registers.