A/D converter and semiconductor device

A semiconductor device comprising an A/D converter,

• wherein the A/D converter includes:
• a successive approximation algorithm setting register storing a plurality of successive approximation algorithms;
• an algorithm selection unit selecting a predetermined successive approximation algorithm from the plurality of successive approximation algorithms;
• a control circuit generating a comparison value based on the selected predetermined successive approximation algorithm;
• and
• a DAC generating a comparison voltage from the comparison value;
• and
• a comparator making a comparison of an analog input voltage and a comparison voltage,
• wherein the control circuit:
• generates the comparison value from a result of the comparison made by the comparator based on the selected predetermined successive approximation algorithm;
• and
• converts the analog input voltage into a digital signal from the result of the comparison made by the comparator at least a number of times equal to a number of bits of the digital signal,
• wherein the A/D converter further has a clock setting register that outputs clock frequency information indicating operational timing, and
• wherein the algorithm selection unit selects the predetermined successive approximation algorithm based on the frequency information outputted from the clock setting register.