Semiconductor package and method of fabricating the same

A semiconductor package, comprising:

• a package substrate;
• a first semiconductor chip on the package substrate;
• a redistribution layer on the first semiconductor chip;
• a plurality of first connection wires on one side of the first semiconductor chip, the first connection wires vertically connecting the package substrate to the redistribution layer;
• and
• a chip stack including a plurality of second semiconductor chips that are stacked on the redistribution layer,
• wherein the chip stack is on a side of the redistribution layer opposite to a side of the redistribution layer including the first semiconductor chip,
• wherein each second semiconductor chip of the plurality of second semiconductor chips has a chip pad on a bottom surface of the second semiconductor chip, and
• wherein the plurality of second semiconductor chips are electrically connected to the redistribution layer through a plurality of second connection wires that vertically connect chip pads of the plurality of second semiconductor chips to substrate pads of the redistribution layer.

A method of fabricating a semiconductor package, the method comprising:

• stacking a plurality of first semiconductor chips on a dummy substrate to form a chip stack;
• forming a plurality of first bonding wires that connect a dummy pad of the dummy substrate to first chip pads of the first semiconductor chips, an uppermost end of each of the first bonding wires is at a level higher than a level of a top surface of the chip stack;
• forming on the dummy substrate a first molding layer that encapsulates the chip stack and the first bonding wires;
• allowing the first molding layer to undergo a thinning process that divides the first bonding wires into a plurality of second bonding wires each of which extends from one of the first chip pads and is exposed on a top surface of the first molding layer;
• forming on the first molding layer a redistribution layer electrically connected to the second bonding wires;
• placing a second semiconductor chip on the redistribution layer, wherein the chip stack is on a side of the redistribution layer opposite to a side of the redistribution layer including the second semiconductor chip;
• forming a plurality of vertical connection terminals on one side of the second semiconductor chip and on the redistribution layer;
• and
• forming a package substrate on the redistribution layer and the second semiconductor chip, the package substrate being connected to the vertical connection terminals.