Floating point to fixed point conversion

A non-transitory computer readable storage medium having stored thereon a computer readable description of a binary logic circuit for converting a number in floating point format having an exponent E of ew bits, an exponent bias B given by B=2ew−1−1, and a significand comprising a mantissa M of mw bits into a fixed point format with an integer width of iw bits and a fractional width of fw bits that, when processed in an integrated circuit manufacturing system, causes the integrated circuit manufacturing system to manufacture an integrated circuit embodying the binary logic circuit, the binary logic circuit comprising:

• a shifter operable to receive a significand input comprising a contiguous set of the most significant bits of the significand and configured to left-shift the significand input by a number of bits equal to the value represented by k least significant bits of the exponent to generate a shifter output, wherein k is dependent on the integer width iw or the fractional width fw;
• and
• a multiplexer coupled to the shifter and configured to:
• receive an input comprising a contiguous set of bits of the shifter output;
• and output the input if the most significant bit of the exponent is equal to one.