Memory device, memory system, and method for data calculation with the memory device
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsYue Sheng, Shu Xie
Life of this patent
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Abstract
A memory device, a memory system, and a method for data calculation with the memory device are provided. The memory device includes an array of memory cells and a peripheral circuit coupled to the memory cells is provided. The peripheral circuit includes a control logic configured to program first data and second data into different banks of the banks of memory cells, at least one process unit configured to perform calculation based on the first data and the second data, and a data-path bus coupled to the control logic and the at least one process unit to transmit the first date and the second data.
Claims20
A memory device comprising:
- banks of memory cells;
- and
- a peripheral circuit coupled to the banks of memory cells and comprising:
- a control logic configured to program first data and second data into different banks of the banks of memory cells;
- at least one process unit coupled to the banks of memory cells via a data-path bus of the peripheral circuit, and configured to perform calculation based on the first data and the second data;
- wherein
- the first data is programmed into N first data segments, wherein N is a positive integer and N≥2;
- and
- the second data is programmed into N data groups, each data group comprising M second data segments, wherein M is a positive integer and M≥2.
A method for data calculation with a memory device comprising banks of memory cells and a peripheral circuit coupled to the banks of memory cells, comprising:
- obtaining, by a control logic of the peripheral circuit via a data-path bus of the peripheral circuit, first data and second data from a data interface of the memory device;
- programming the first data and second data into the banks of memory cells;
- and
- performing calculation, by at least one process unit of the peripheral circuit, based on the first and the second data;
- wherein
- the first data is programmed into a number N of first data segments, wherein N is a positive integer and N≥2;
- and
- the second data is programmed into the number N of data groups, each data group comprising a number M of second data segments, wherein M is a positive integer and M≥2.
A system comprising:
- a memory device comprising:
- banks of memory cells of memory cells;
- and
- a peripheral circuit coupled to the banks of memory cells and comprising:
- a control logic configured to program first data and second data into the memory banks;
- at least one process unit coupled to the banks of memory cells via a data-path bus of the peripheral circuit, and configured to perform calculation based on the first data and the second data;
- and
- a controller coupled with the memory device and configured to transmit the first data into the memory device and receive a result of the calculation from the memory device;
- wherein
- the first data is programmed into N first data segments, wherein N is a positive integer and N≥2;
- and
- the second data is programmed into N data groups, and each data group comprising M second data segments, wherein M is a positive integer and M≥2.
Dependencies are inferred from the claim text.