Trench-gate sic mosfet device and manufacturing method therefor

A method for manufacturing a trench-gate SiC MOSFET device, the method comprising:

• forming a gate trench by etching a 4H—SiC substrate having a doped layer for a source region, the gate trench being deeper than the doped layer for a source region;
• forming a first gate oxide film;
• performing ion implantation to form a doped well in a bottom region of the gate trench;
• removing the first gate oxide film;
• performing annealing in a H2 atmosphere;
• performing a sacrificial oxidation process (SOP) in which dry oxidation is conducted at 800-1200° C. for 30-50 minutes;
• forming a second gate oxide film with TEOS oxide film, followed by annealing in a NO atmosphere;
• forming a gate electrode within the gate trench;
• forming an interlayer dielectric on the substrate with the gate electrode;
• patterning the second gate oxide film and the interlayer dielectric;
• a source electrode covering an upper surface of the doped layer for the source region formed in a front surface of an epitaxial layer of the substrate and an upper surface of the interlayer dielectric;
• and
• forming a drain electrode on a back surface of the substrate,
• wherein a carbon compound generated in a SiC interface by the annealing in the H2 atmosphere is oxidized or removed by the SOP and a reverse leakage current is reduced by the SOP process, the reverse leakage current being caused by a leaky interfacial layer formed by the carbon compound including a graphitic carbon layer in the trench-gate SiC MOSFET device.