Substrate structures and methods of manufacture

A power electronic substrate, comprising:

• a plurality of metallic traces coupled to a first dielectric layer, wherein the plurality of metallic traces comprise a first thickness and a second thickness measured perpendicularly to the first dielectric layer;
• a ceramic layer comprising a first side and a second side, wherein the first side of the ceramic layer is coupled to the first dielectric layer;
• a second dielectric layer coupled to the second side of the ceramic layer;
• and
• a metallic baseplate coupled to the second dielectric layer;
• wherein the ceramic layer comprises a recess formed in the first side;
• and
• wherein a portion of the plurality of metallic traces are coupled within the recess.

A power electronic substrate, comprising:

• a plurality of metallic traces coupled to a first dielectric layer, wherein the plurality of metallic traces comprise a first thickness and a second thickness measured perpendicularly to the first dielectric layer;
• a ceramic layer comprising a first surface and a second surface, wherein the first surface of the ceramic layer is coupled to the first dielectric layer;
• a second dielectric layer coupled to the second surface of the ceramic layer;
• and
• a metallic baseplate coupled to the second dielectric layer;
• wherein the ceramic layer comprises two different thicknesses, the first surface of the ceramic layer comprising a step therein;
• wherein the first dielectric layer covers a first portion of the first surface of the ceramic layer and a second portion of the first surface of the ceramic layer;
• wherein the step in the first surface separates the first portion from the second portion;
• and
• wherein a metallic trace of the plurality of metallic traces overlies the step.