Large area synthesis of cubic phase gallium nitride on silicon

A wafer comprising:

• a buried substrate;
• a first layer of silicon (100) disposed on the buried substrate that includes silicon sidewalls (111) at an angle to the buried substrate and that form a bottom of each of multiple U-shaped grooves;
• a second layer of patterned oxide disposed on the silicon (100) that provides vertical sidewalls of each U-shaped groove formed within the first and second layers;
• a third layer of a buffer covering the silicon sidewalls (111) of the first layer and the buried substrate within the U-shaped grooves, wherein the third layer further covers the second layer at least partway up the vertical sidewalls;
• and
• multiple gallium nitride (GaN)-based structures disposed within the multiple U-shaped grooves, wherein each of the multiple GaN-based structures includes cubic gallium nitride (c-GaN) formed at merged growth fronts of hexagonal gallium nitride (h-GaN) that extend from the silicon sidewalls (111).