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US 12,408,486 B2Granted
High efficiency microdevice
AssigneeVueReal Inc.
InventorsGholamreza Chaji, Ehsanollah Fathi, Hossein Zamani Siboni
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Abstract
A vertical solid state device comprising: a connection pad; and side walls comprising a metal-insulator-semiconductor (MIS) structure; wherein a gate of the MIS structure is shorted to at least one contact of the vertical solid state device and a threshold voltage (VT) of the MIS structure is adjusted to increase the efficiency of the device.
Claims5
A method to increase efficiency in a vertical solid state device, the method comprising:
- providing a solid state device comprising a connection pad and side walls comprising a metal-insulator-semiconductor (MIS) structure;
- applying a biasing voltage to a gate electrode connected to the MIS structure and shorting the MIS structure to a n-contact of the vertical solid state device;
- and
- keeping the biasing voltage of the gate electrode less than a threshold voltage of the MIS structure to increase the efficiency of the vertical solid state device.
1 more element
Dependencies are inferred from the claim text.