US 12,407,310 B2Granted

Power efficient complementary amplifier and method thereof

AssigneeRealtek Semiconductor Corp.

InventorChia-Liang (Leon) Lin

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Abstract

A method operates by receiving an input signal; transforming the input signal into a first transformed signal of a common-mode voltage equal to a first bias voltage; transforming the input signal into a second transformed signal of a common-mode voltage equal to a second bias voltage; detecting a peak of the first transformed signal and making the first bias voltage equal to a sum of a first DC (direct current) voltage and a first dynamic voltage; detecting a valley of the second transformed signal and making the second bias voltage equal to a sum of a second DC voltage and a second dynamic voltage; amplifying the first transformed signal into a first output signal across a first load using a N-type cascode amplifier; and amplifying the second transformed signal into a second output signal across a second load using a P-type cascode amplifier.

Claims20

Dependent claims

An amplifier comprising:

a transformer configured to transform an input signal received from a primary coil into a first transformed signal of a first bias voltage and a second transformed signal of a second bias voltage via a first secondary coil and a secondary coil, respectively;
a N-type dynamic bias circuit configured to receive the first transformed signal and output the first bias voltage in accordance with a first DC (direct current) voltage and a peak of the first transformed signal;
a P-type dynamic bias circuit configured to receive the second transformed signal and output the second bias voltage in accordance with a second DC voltage and a valley of the second transformed signal;
a N-type cascode amplifier configured to receive the first transformed signal and output a first output signal across a first load;
and
a P-type cascode amplifier configured to receive the second transformed signal and output a second output signal across a second load, wherein:
the N-type cascode amplifier and the P-type cascode amplifier share a common source node.

4 more elements

A method comprising the following steps:

receiving an input signal;
transforming the input signal into a first transformed signal of a common-mode voltage equal to a first bias voltage;
transforming the input signal into a second transformed signal of a common-mode voltage equal to a second bias voltage;
detecting a peak of the first transformed signal and making the first bias voltage equal to a sum of a first DC (direct current) voltage and a first dynamic voltage approximately proportional to the peak;
detecting a valley of the second transformed signal and making the second bias voltage equal to a sum of a second DC voltage and a second dynamic voltage approximately proportional to the valley;
amplifying the first transformed signal into a first output signal across a first load using a N-type cascode amplifier;
and
amplifying the second transformed signal into a second output signal across a second load using a P-type cascode amplifier, wherein the N-type cascode amplifier and the P-type amplifier share a common source node.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/182,439Filed 13 Mar 2023
Published: US 2024/0313721 A119 Sep 2024
Granted: 2 Sep 2025
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

H03F 3/45188
Long tailed pairs: non-folded cascode stages
H03F 3/45242
Complementary long tailed pairs having parallel inputs and being supplied in series: non-folded cascode stages
H03F 1/0261
In transistor amplifiers: with control of the polarisation voltage or current, e.g. gliding Class A
H03F 1/223
By use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively: with mosfet's